midware_shared_diag_private.c

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// Framework Includes
#include <driver_cpuctrl.h>
#include <driver_errctrl.h>
#include <midware_shared_diag_private.h>
 
// Device-specific Includes
#include <xc.h>
 
static volatile bool wasGlobalInterruptsEnabled = false;
static volatile bool isAtomicSectionOngoing     = false;
 
void AtomicSectionStart(void)
{
    // Skip execution if Atomic Section is ongoing to avoid overwriting backup
    if (isAtomicSectionOngoing)
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return;
    }
 
    const uint8_t gieMask         = (uint8_t)CPU_I_bm; // Global Interrupt Enable status bit
    const uint8_t cpuStatusRegVal = CPUCTRL_ReadStatusRegister();
    wasGlobalInterruptsEnabled    = ((cpuStatusRegVal & gieMask) == gieMask);
 
    CPUCTRL_ClearStatusRegister((uint8_t)CPU_I_bm);
 
    isAtomicSectionOngoing = true;
}
 
void AtomicSectionEnd(void)
{
    // Skip execution if Atomic Section is not ongoing to avoid restoring old backup
    if (!isAtomicSectionOngoing)
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return;
    }
 
    isAtomicSectionOngoing = false;
 
    if (wasGlobalInterruptsEnabled)
    {
        CPUCTRL_SetStatusRegister((uint8_t)CPU_I_bm);
    }
}
 
bool IsErrChConfigurable(uint32_t channelMask)
{
    // Entering CONFIG state when the error controller is not in NORMAL state results in Bus error
    const uint8_t stateMask         = (uint8_t)ERRCTRL_STATE_gm;
    const uint8_t normalStateConfig = (uint8_t)ERRCTRL_STATE_NORMAL_gc;
    const uint8_t regVal            = ERRCTRL_ReadControlA();
    const bool isStateNormal        = ((regVal & stateMask) == normalStateConfig);
 
    // Injecting error on already set channel might mask actual faults
    const uint32_t chStatus = ERRCTRL_ReadChannelStatus();
    const bool isErrorChSet = ((chStatus & channelMask) != 0UL);
 
    return (!isErrorChSet && isStateNormal);
}