midware_memory_manager.c

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// Standard Library Includes
#include <stdbool.h>
#include <stdint.h>
 
// Framework Includes
#include <define_error_flags.h>
#include <driver_cpuctrl.h>
#include <driver_gpr.h>
#include <driver_nvmctrl.h>
#include <driver_ramctrl.h>
#include <midware_memory_manager.h>
 
// Device-specific Includes
#include <xc.h>
 
/*
 * The GPR registers are utilized to store flags and values that needs to be persistent and kept
 * through a non-POR/BOR device reset. The registers are shown below with bits and bit fields used
 * to store the values. Each bit is defined with its own bitmask, and each bit field is defined with
 * its own bit field position and group mask, except PVAL_ERRID_REASON in GPR0 as it occupies the
 * entire register with it's value. All error flags are stored with two bits in redundant locations,
 * where both bits need to be equal to be considered valid. The locations of the dual bits
 * representing a flag are separated in the registers to minimize the probability of masking a
 * corrupt flag should an unexpected reset occur. The bit fields are validated by a checksum which
 * is calculated on each store operation and is checked for corruption using a dedicated function.
 *
 * |    |  Bit 7   |  Bit 6   |  Bit 5   |  Bit 4   |   Bit 3   |  Bit 2   |   Bit 1   |  Bit 0   |
 * |----|----------|----------|----------|----------|-----------|----------|-----------|----------|
 * |GPR0|                            PVAL_ERRID_REASON [7:0]                                      |
 * |GPR1| PVAL_ERRINJ_REASON  |                     PVAL_RESET_REASON [5:0]                       |
 * |GPR2|            PVAL_CHECKSUM [7:4]            |IO_FLOAT0  |CPU_FAULT0|SWDT_FAULT0|WDT_FAULT0|
 * |GPR3|IS_ERRINJ0|INV_INPUT0|IO_FAULT1 |CPU_FAULT1|SWDT_FAULT1|WDT_FAULT1|INV_INPUT1 |IS_ERRINJ1|
 *
 */
 
// Used to store PVAL_ERRINJ_REASON
#define GPR_ERRINJRSN_GP 6U    
#define GPR_ERRINJRSN_GM 0xC0U 
 
// Used to store PVAL_RESET_REASON
#define GPR_RSTRSN_GP 0U    
#define GPR_RSTRSN_GM 0x3FU 
 
// Used to store PVAL_CHECKSUM
#define GPR_CHECKSUM_GP 4U    
#define GPR_CHECKSUM_GM 0xF0U 
 
// Used to store PFLAG_IS_ERRINJ
#define GPR_IS_ERRINJ0_BM 0x80U 
#define GPR_IS_ERRINJ1_BM 0x01U 
 
// Used to store PFLAG_CPU_INJ_FAULT
#define GPR_CPU_FAULT0_BM 0x04U 
#define GPR_CPU_FAULT1_BM 0x10U 
 
// Used to store PFLAG_SWDT_INJ_FAULT
#define GPR_SWDT_FAULT0_BM 0x02U 
#define GPR_SWDT_FAULT1_BM 0x08U 
 
// Used to store PFLAG_WDT_INJ_FAULT
#define GPR_WDT_FAULT0_BM 0x01U 
#define GPR_WDT_FAULT1_BM 0x04U 
 
// Used to store PFLAG_IO_FLOAT_FAULT
#define GPR_IO_FAULT0_BM 0x08U 
#define GPR_IO_FAULT1_BM 0x20U 
 
// Used to store INVALID_INPUT_FLAG
#define GPR_INV_INPUT0_BM 0x40U 
#define GPR_INV_INPUT1_BM 0x02U 
 
// Private function prototypes
static void SetFlagType(persistentFlag_t flagType);
static void ClearFlagType(persistentFlag_t flagType);
 
static void SetErrInjFlag(void);
static void SetCpuInjFlag(void);
static void SetWdtInjFlag(void);
static void SetSwdtInjFlag(void);
static void SetIoFloatFlag(void);
static void SetInvalidInputFlag(void);
 
static void ClearErrInjFlag(void);
static void ClearCpuInjFlag(void);
static void ClearWdtInjFlag(void);
static void ClearSwdtInjFlag(void);
static void ClearIoFloatFlag(void);
 
static bool GetErrInjFlag(void);
static bool GetCpuInjFlag(void);
static bool GetWdtInjFlag(void);
static bool GetSwdtInjFlag(void);
static bool GetIoFloatFlag(void);
static bool GetInvalidInputFlag(void);
 
static bool IsErrInjFlagCorrupt(void);
static bool IsCpuInjFlagCorrupt(void);
static bool IsWdtInjFlagCorrupt(void);
static bool IsSwdtInjFlagCorrupt(void);
static bool IsIoFloatFlagCorrupt(void);
static bool IsInvalidInputFlagCorrupt(void);
 
static bool IsChecksumCorrupt(void);
static void UpdateValsChecksum(void);
static uint8_t CalculateChecksum(uint16_t value);
static uint16_t ConcatPersistentVals(void);
 
errFlag_t MW_GetClearBusError(void)
{
    const uint8_t regVal     = CPUCTRL_ReadIntFlags();
    const uint8_t busErrMask = (uint8_t)CPU_BUSERR_bm;
    const bool isBusError    = ((regVal & busErrMask) == busErrMask);
 
    errFlag_t flag = NO_ERROR;
    if (isBusError)
    {
        flag = ERROR;
        CPUCTRL_WriteIntFlags(busErrMask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearCpuDataParityError(void)
{
    const uint8_t regVal         = CPUCTRL_ReadIntFlags();
    const uint8_t dataParityMask = (uint8_t)CPU_PARITYD_bm;
    const bool isParityError     = ((regVal & dataParityMask) == dataParityMask);
 
    errFlag_t flag = NO_ERROR;
    if (isParityError)
    {
        flag = ERROR;
        CPUCTRL_WriteIntFlags(dataParityMask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearCpuInstrParityError(void)
{
    const uint8_t regVal          = CPUCTRL_ReadIntFlags();
    const uint8_t instrParityMask = (uint8_t)CPU_PARITYI_bm;
    const bool isParityError      = ((regVal & instrParityMask) == instrParityMask);
 
    errFlag_t flag = NO_ERROR;
    if (isParityError)
    {
        flag = ERROR;
        CPUCTRL_WriteIntFlags(instrParityMask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearCpuOpcodeError(void)
{
    const uint8_t regVal     = CPUCTRL_ReadIntFlags();
    const uint8_t opcodeMask = (uint8_t)CPU_OPC_bm;
    const bool isOpcodeError = ((regVal & opcodeMask) == opcodeMask);
 
    errFlag_t flag = NO_ERROR;
    if (isOpcodeError)
    {
        flag = ERROR;
        CPUCTRL_WriteIntFlags(opcodeMask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearRamStackError(void)
{
    const uint8_t regVal         = CPUCTRL_ReadIntFlags();
    const uint8_t stackLimitMask = (uint8_t)CPU_SPLIM_bm;
    const bool isStackError      = ((regVal & stackLimitMask) == stackLimitMask);
 
    errFlag_t flag = NO_ERROR;
    if (isStackError)
    {
        flag = ERROR;
        CPUCTRL_WriteIntFlags(stackLimitMask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearRamEccCompError(void)
{
    const uint8_t regVal      = RAMCTRL_ReadIntFlags();
    const uint8_t eccCompMask = (uint8_t)RAMCTRL_COMP_bm;
    const bool isEccError     = ((regVal & eccCompMask) == eccCompMask);
 
    errFlag_t flag = NO_ERROR;
    if (isEccError)
    {
        flag = ERROR;
        RAMCTRL_WriteIntFlags(eccCompMask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearRamEcc1Error(void)
{
    const uint8_t regVal   = RAMCTRL_ReadIntFlags();
    const uint8_t ecc1Mask = (uint8_t)RAMCTRL_ECC1_bm;
    const bool isEcc1Error = ((regVal & ecc1Mask) == ecc1Mask);
 
    errFlag_t flag = NO_ERROR;
    if (isEcc1Error)
    {
        flag = ERROR;
        RAMCTRL_WriteIntFlags(ecc1Mask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearRamEcc2Error(void)
{
    const uint8_t regVal   = RAMCTRL_ReadIntFlags();
    const uint8_t ecc2Mask = (uint8_t)RAMCTRL_ECC2_bm;
    const bool isEcc2Error = ((regVal & ecc2Mask) == ecc2Mask);
 
    errFlag_t flag = NO_ERROR;
    if (isEcc2Error)
    {
        flag = ERROR;
        RAMCTRL_WriteIntFlags(ecc2Mask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearRamParityError(void)
{
    const uint8_t regVal      = RAMCTRL_ReadIntFlags();
    const uint8_t controlMask = (uint8_t)RAMCTRL_PARITYC_bm;
    const uint8_t addressMask = (uint8_t)RAMCTRL_PARITYA_bm;
    const uint8_t dataMask    = (uint8_t)RAMCTRL_PARITYD_bm;
    const uint8_t parityMask  = (controlMask | addressMask | dataMask);
    const bool isControlError = ((regVal & controlMask) == controlMask);
    const bool isAddressError = ((regVal & addressMask) == addressMask);
    const bool isDataError    = ((regVal & dataMask) == dataMask);
 
    errFlag_t flag = NO_ERROR;
    if (isControlError || isAddressError || isDataError)
    {
        flag = ERROR;
        RAMCTRL_WriteIntFlags(parityMask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearNvmEccCompError(void)
{
    const uint8_t regVal      = NVMCTRL_ReadIntFlagsB();
    const uint8_t eccCompMask = (uint8_t)NVMCTRL_COMP_bm;
    const bool isCompError    = ((regVal & eccCompMask) == eccCompMask);
 
    errFlag_t flag = NO_ERROR;
    if (isCompError)
    {
        flag = ERROR;
        NVMCTRL_WriteIntFlagsB(eccCompMask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearNvmFlashEcc1Error(void)
{
    const uint8_t regVal        = NVMCTRL_ReadIntFlagsB();
    const uint8_t flashEcc1Mask = (uint8_t)NVMCTRL_FECC1_bm;
    const bool isEcc1Error      = ((regVal & flashEcc1Mask) == flashEcc1Mask);
 
    errFlag_t flag = NO_ERROR;
    if (isEcc1Error)
    {
        flag = ERROR;
        NVMCTRL_WriteIntFlagsB(flashEcc1Mask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearNvmFlashEcc2Error(void)
{
    const uint8_t regVal        = NVMCTRL_ReadIntFlagsB();
    const uint8_t flashEcc2Mask = (uint8_t)NVMCTRL_FECC2_bm;
    const bool isEcc2Error      = ((regVal & flashEcc2Mask) == flashEcc2Mask);
 
    errFlag_t flag = NO_ERROR;
    if (isEcc2Error)
    {
        flag = ERROR;
        NVMCTRL_WriteIntFlagsB(flashEcc2Mask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearNvmParityError(void)
{
    const uint8_t regVal      = NVMCTRL_ReadIntFlagsB();
    const uint8_t controlMask = (uint8_t)NVMCTRL_PARITYC_bm;
    const uint8_t addressMask = (uint8_t)NVMCTRL_PARITYA_bm;
    const uint8_t dataMask    = (uint8_t)NVMCTRL_PARITYD_bm;
    const uint8_t parityMask  = (controlMask | addressMask | dataMask);
    const bool isControlError = ((regVal & controlMask) == controlMask);
    const bool isAddressError = ((regVal & addressMask) == addressMask);
    const bool isDataError    = ((regVal & dataMask) == dataMask);
 
    errFlag_t flag = NO_ERROR;
    if (isControlError || isAddressError || isDataError)
    {
        flag = ERROR;
        NVMCTRL_WriteIntFlagsB(parityMask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearNvmEepromEcc1Error(void)
{
    const uint8_t regVal         = NVMCTRL_ReadIntFlagsB();
    const uint8_t eepromEcc1Mask = (uint8_t)NVMCTRL_EECC1_bm;
    const bool isEcc1Error       = ((regVal & eepromEcc1Mask) == eepromEcc1Mask);
 
    errFlag_t flag = NO_ERROR;
    if (isEcc1Error)
    {
        flag = ERROR;
        NVMCTRL_WriteIntFlagsB(eepromEcc1Mask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_GetClearNvmEepromEcc2Error(void)
{
    const uint8_t regVal         = NVMCTRL_ReadIntFlagsB();
    const uint8_t eepromEcc2Mask = (uint8_t)NVMCTRL_EECC2_bm;
    const bool isEcc2Error       = ((regVal & eepromEcc2Mask) == eepromEcc2Mask);
 
    errFlag_t flag = NO_ERROR;
    if (isEcc2Error)
    {
        flag = ERROR;
        NVMCTRL_WriteIntFlagsB(eepromEcc2Mask); // The flag is cleared by writing the flag bitmask
    }
 
    return flag;
}
 
errFlag_t MW_SetNvmEccAllOnes(eccAllOnes_t config)
{
    if (config >= ECC_ALL_ONES_MAX)
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return ERROR;
    }
 
    const uint8_t eccAllOnesMask = (uint8_t)NVMCTRL_ECCALL1_gm;
    const uint8_t groupConfig    = ((uint8_t)config << NVMCTRL_ECCALL1_gp);
    NVMCTRL_ModifyControlC(eccAllOnesMask, groupConfig);
 
    return NO_ERROR;
}
 
errFlag_t MW_SetRamStackLimit(uint16_t splimAddr, bool lockEnable)
{
    const uint16_t ramAddrStart = INTERNAL_SRAM_START;
    const uint16_t ramAddrEnd   = INTERNAL_SRAM_START + INTERNAL_SRAM_SIZE - 1U;
    const bool isInvalidRamAddr = ((splimAddr < ramAddrStart) || (splimAddr > ramAddrEnd));
    if (isInvalidRamAddr)
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return ERROR;
    }
 
    CPUCTRL_WriteSplim(splimAddr);
 
    if (lockEnable)
    {
        CPUCTRL_SetControlA((uint8_t)CPU_SPLOCK_bm);
    }
 
    return NO_ERROR;
}
 
void MW_StorePersistentFlag(persistentFlag_t flagType, bool flag)
{
    if (flagType >= PFLAG_MAX)
    {
        // Set error flag indicating that function was called with invalid input
        SetInvalidInputFlag();
 
        /* cppcheck-suppress misra-c2012-15.5 */
        return; // Invalid input flag is checked when checking persistent flag corruption later
    }
 
    if (flag)
    {
        SetFlagType(flagType);
    }
    else
    {
        ClearFlagType(flagType);
    }
}
 
void MW_StorePersistentVal(persistentVal_t valueType, uint8_t value)
{
    if (valueType >= PVAL_MAX)
    {
        // Set error flag indicating that function was called with invalid input
        SetInvalidInputFlag();
 
        /* cppcheck-suppress misra-c2012-15.5 */
        return; // Invalid input flag is checked when checking persistent value corruption later
    }
 
    if (IsChecksumCorrupt())
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return; // Abort to prevent a new checksum to be calculated with corrupted data
    }
 
    uint8_t rstRsnConfig = value << GPR_RSTRSN_GP;
    uint8_t errInjConfig = value << GPR_ERRINJRSN_GP;
 
    if (PVAL_ERRID_REASON == valueType)
    {
        GPR_WriteRegister0(value);
    }
    else if (PVAL_RESET_REASON == valueType)
    {
 
        GPR_ModifyRegister1(GPR_RSTRSN_GM, rstRsnConfig);
    }
    else // PVAL_ERRINJ_REASON == valueType
    {
        GPR_ModifyRegister1(GPR_ERRINJRSN_GM, errInjConfig);
    }
 
    // Calculate and store new checksum
    UpdateValsChecksum();
}
 
bool MW_GetPersistentFlag(persistentFlag_t flagType)
{
    bool isFlagSet = false; // Default to not set if invalid flag type
 
    switch (flagType)
    {
    case PFLAG_ERRINJ_ONGOING:
        isFlagSet = GetErrInjFlag();
        break;
    case PFLAG_CPU_INJ_FAULT:
        isFlagSet = GetCpuInjFlag();
        break;
    case PFLAG_WDT_INJ_FAULT:
        isFlagSet = GetWdtInjFlag();
        break;
    case PFLAG_SWDT_INJ_FAULT:
        isFlagSet = GetSwdtInjFlag();
        break;
    case PFLAG_IO_FLOAT_FAULT:
        isFlagSet = GetIoFloatFlag();
        break;
    default:
        SetInvalidInputFlag();
        break;
    }
 
    return isFlagSet;
}
 
uint8_t MW_GetPersistentVal(persistentVal_t valueType)
{
    uint8_t persistentVal = 0xFFU; // Default to max type value if invalid value type is requested
 
    if (valueType >= PVAL_MAX)
    {
        // Set error flag indicating that function was called with invalid input
        SetInvalidInputFlag();
 
        /* cppcheck-suppress misra-c2012-15.5 */
        return persistentVal; // Invalid input flag is checked later
    }
 
    if (PVAL_ERRID_REASON == valueType)
    {
        persistentVal = GPR_ReadRegister0();
    }
    else
    {
        uint8_t gprRegVal1 = GPR_ReadRegister1();
        if (PVAL_RESET_REASON == valueType)
        {
            persistentVal = gprRegVal1 >> GPR_RSTRSN_GP;
        }
        else // PVAL_ERRINJ_REASON == valueType
        {
            persistentVal = gprRegVal1 >> GPR_ERRINJRSN_GP;
        }
    }
    return persistentVal;
}
 
bool MW_IsPersistentFlagsCorrupt(void)
{
    // Persistent data was attempted accessed with invalid flag/value type, flags cannot be trusted
    bool wasInvalidInput = IsInvalidInputFlagCorrupt() || GetInvalidInputFlag();
    if (wasInvalidInput)
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return true;
    }
 
    if (IsIoFloatFlagCorrupt())
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return true;
    }
 
    if (IsErrInjFlagCorrupt())
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return true;
    }
 
    if (IsCpuInjFlagCorrupt())
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return true;
    }
 
    if (IsWdtInjFlagCorrupt())
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return true;
    }
 
    if (IsSwdtInjFlagCorrupt())
    {
        /* cppcheck-suppress misra-c2012-15.5 */
        return true;
    }
 
    return false;
}
 
bool MW_IsPersistentValsCorrupt(void)
{
    // Persistent data was attempted accessed with invalid flag/value type, values cannot be trusted
    bool wasInvalidInput = GetInvalidInputFlag();
    bool isValsCorrupted = IsChecksumCorrupt();
    bool isCorrupted     = wasInvalidInput || isValsCorrupted;
 
    return isCorrupted;
}
 
void MW_ClearPersistentFlags(void)
{
    const uint8_t clearValue = 0x00U;
    const uint8_t clearMask
        = (GPR_IO_FAULT0_BM | GPR_CPU_FAULT0_BM | GPR_SWDT_FAULT0_BM | GPR_WDT_FAULT0_BM);
 
    GPR_ModifyRegister2(clearMask, clearValue); // Only clear flags in GPR2
    GPR_WriteRegister3(clearValue);
}
 
void MW_ClearPersistentVals(void)
{
    const uint8_t clearValue = 0x00U;
 
    GPR_WriteRegister0(clearValue);
    GPR_WriteRegister1(clearValue);
    GPR_ModifyRegister2(GPR_CHECKSUM_GM, clearValue);
}
 
// Sets the specified flag to true
static void SetFlagType(persistentFlag_t flagType)
{
    switch (flagType)
    {
    case PFLAG_ERRINJ_ONGOING:
        SetErrInjFlag();
        break;
    case PFLAG_CPU_INJ_FAULT:
        SetCpuInjFlag();
        break;
    case PFLAG_WDT_INJ_FAULT:
        SetWdtInjFlag();
        break;
    case PFLAG_SWDT_INJ_FAULT:
        SetSwdtInjFlag();
        break;
    case PFLAG_IO_FLOAT_FAULT:
    default:
        SetIoFloatFlag();
        break;
    }
}
 
// Sets the specified flag to false
static void ClearFlagType(persistentFlag_t flagType)
{
    switch (flagType)
    {
    case PFLAG_ERRINJ_ONGOING:
        ClearErrInjFlag();
        break;
    case PFLAG_CPU_INJ_FAULT:
        ClearCpuInjFlag();
        break;
    case PFLAG_WDT_INJ_FAULT:
        ClearWdtInjFlag();
        break;
    case PFLAG_SWDT_INJ_FAULT:
        ClearSwdtInjFlag();
        break;
    case PFLAG_IO_FLOAT_FAULT:
    default:
        ClearIoFloatFlag();
        break;
    }
}
 
// Stores PFLAG_IS_ERRINJ as true
static void SetErrInjFlag(void)
{
    const uint8_t combinedMask = GPR_IS_ERRINJ0_BM | GPR_IS_ERRINJ1_BM;
    GPR_SetRegister3(combinedMask);
}
 
// Stores PFLAG_CPU_INJ_FAULT as true
static void SetCpuInjFlag(void)
{
    GPR_SetRegister2(GPR_CPU_FAULT0_BM);
    GPR_SetRegister3(GPR_CPU_FAULT1_BM);
}
 
// Stores PFLAG_WDT_INJ_FAULT as true
static void SetWdtInjFlag(void)
{
    GPR_SetRegister2(GPR_WDT_FAULT0_BM);
    GPR_SetRegister3(GPR_WDT_FAULT1_BM);
}
 
// Stores PFLAG_SWDT_INJ_FAULT as true
static void SetSwdtInjFlag(void)
{
    GPR_SetRegister2(GPR_SWDT_FAULT0_BM);
    GPR_SetRegister3(GPR_SWDT_FAULT1_BM);
}
 
// Stores PFLAG_IO_FLOAT_FAULT as true
static void SetIoFloatFlag(void)
{
    GPR_SetRegister2(GPR_IO_FAULT0_BM);
    GPR_SetRegister3(GPR_IO_FAULT1_BM);
}
 
// Stores Invalid Input flag as true
static void SetInvalidInputFlag(void)
{
    const uint8_t combinedMask = GPR_INV_INPUT0_BM | GPR_INV_INPUT1_BM;
    GPR_SetRegister3(combinedMask);
}
 
// Stores PFLAG_IS_ERRINJ as false
static void ClearErrInjFlag(void)
{
    const uint8_t combinedMask = GPR_IS_ERRINJ0_BM | GPR_IS_ERRINJ1_BM;
    GPR_ClearRegister3(combinedMask);
}
 
// Stores PFLAG_CPU_INJ_FAULT as false
static void ClearCpuInjFlag(void)
{
    GPR_ClearRegister2(GPR_CPU_FAULT0_BM);
    GPR_ClearRegister3(GPR_CPU_FAULT1_BM);
}
 
// Stores PFLAG_WDT_INJ_FAULT as false
static void ClearWdtInjFlag(void)
{
    GPR_ClearRegister2(GPR_WDT_FAULT0_BM);
    GPR_ClearRegister3(GPR_WDT_FAULT1_BM);
}
 
// Stores PFLAG_SWDT_INJ_FAULT as false
static void ClearSwdtInjFlag(void)
{
    GPR_ClearRegister2(GPR_SWDT_FAULT0_BM);
    GPR_ClearRegister3(GPR_SWDT_FAULT1_BM);
}
 
// Stores PFLAG_IO_FLOAT_FAULT as false
static void ClearIoFloatFlag(void)
{
    GPR_ClearRegister2(GPR_IO_FAULT0_BM);
    GPR_ClearRegister3(GPR_IO_FAULT1_BM);
}
 
// Checks if PFLAG_IS_ERRINJ is stored as true or false
static bool GetErrInjFlag(void)
{
    const uint8_t combinedMask = GPR_IS_ERRINJ0_BM | GPR_IS_ERRINJ1_BM;
    uint8_t gprRegVal3         = GPR_ReadRegister3();
    bool isBothBitsSet         = ((gprRegVal3 & combinedMask) == combinedMask);
 
    return isBothBitsSet;
}
 
// Checks if PFLAG_CPU_INJ_FAULT is true or false
static bool GetCpuInjFlag(void)
{
    uint8_t gprRegVal2 = GPR_ReadRegister2();
    uint8_t gprRegVal3 = GPR_ReadRegister3();
    bool cpuInjFlag0   = ((gprRegVal2 & GPR_CPU_FAULT0_BM) == GPR_CPU_FAULT0_BM);
    bool cpuInjFlag1   = ((gprRegVal3 & GPR_CPU_FAULT1_BM) == GPR_CPU_FAULT1_BM);
 
    return (cpuInjFlag0 && cpuInjFlag1) == true;
}
 
// Checks if PFLAG_WDT_INJ_FAULT is true or false
static bool GetWdtInjFlag(void)
{
    uint8_t gprRegVal2 = GPR_ReadRegister2();
    uint8_t gprRegVal3 = GPR_ReadRegister3();
    bool wdtInjFlag0   = ((gprRegVal2 & GPR_WDT_FAULT0_BM) == GPR_WDT_FAULT0_BM);
    bool wdtInjFlag1   = ((gprRegVal3 & GPR_WDT_FAULT1_BM) == GPR_WDT_FAULT1_BM);
 
    return (wdtInjFlag0 && wdtInjFlag1) == true;
}
 
// Checks if PFLAG_SWDT_INJ_FAULT is true or false
static bool GetSwdtInjFlag(void)
{
    uint8_t gprRegVal2 = GPR_ReadRegister2();
    uint8_t gprRegVal3 = GPR_ReadRegister3();
    bool swdtInjFlag0  = ((gprRegVal2 & GPR_SWDT_FAULT0_BM) == GPR_SWDT_FAULT0_BM);
    bool swdtInjFlag1  = ((gprRegVal3 & GPR_SWDT_FAULT1_BM) == GPR_SWDT_FAULT1_BM);
 
    return (swdtInjFlag0 && swdtInjFlag1) == true;
}
 
// Checks if PFLAG_IO_FLOAT_FAULT is true or false
static bool GetIoFloatFlag(void)
{
    uint8_t gprRegVal2 = GPR_ReadRegister2();
    uint8_t gprRegVal3 = GPR_ReadRegister3();
    bool ioFloatFlag0  = ((gprRegVal2 & GPR_IO_FAULT0_BM) == GPR_IO_FAULT0_BM);
    bool ioFloatFlag1  = ((gprRegVal3 & GPR_IO_FAULT1_BM) == GPR_IO_FAULT1_BM);
 
    return (ioFloatFlag0 && ioFloatFlag1) == true;
}
 
// Checks if Invalid Input flag is true or false
static bool GetInvalidInputFlag(void)
{
    const uint8_t combinedMask = GPR_INV_INPUT0_BM | GPR_INV_INPUT1_BM;
    uint8_t gprRegVal3         = GPR_ReadRegister3();
    bool isBothBitsSet         = ((gprRegVal3 & combinedMask) == combinedMask);
 
    return isBothBitsSet;
}
 
// Checks whether the two PFLAG_IS_ERRINJ bits have the same value or is corrupt
static bool IsErrInjFlagCorrupt(void)
{
    uint8_t gprRegVal3 = GPR_ReadRegister3();
    bool isFlagBit0Set = ((gprRegVal3 & GPR_IS_ERRINJ0_BM) == GPR_IS_ERRINJ0_BM);
    bool isFlagBit1Set = ((gprRegVal3 & GPR_IS_ERRINJ1_BM) == GPR_IS_ERRINJ1_BM);
 
    bool isCorrupt = true;
    if (isFlagBit0Set == isFlagBit1Set)
    {
        isCorrupt = false;
    }
 
    return isCorrupt;
}
 
// Checks whether the two PFLAG_CPU_INJ_FAULT bits have the same value or is corrupt
static bool IsCpuInjFlagCorrupt(void)
{
    uint8_t gprRegVal2 = GPR_ReadRegister2();
    uint8_t gprRegVal3 = GPR_ReadRegister3();
    bool cpuInjFlag0   = ((gprRegVal2 & GPR_CPU_FAULT0_BM) == GPR_CPU_FAULT0_BM);
    bool cpuInjFlag1   = ((gprRegVal3 & GPR_CPU_FAULT1_BM) == GPR_CPU_FAULT1_BM);
 
    bool isCorrupt = true;
    if (cpuInjFlag0 == cpuInjFlag1)
    {
        isCorrupt = false;
    }
 
    return isCorrupt;
}
 
// Checks whether the two PFLAG_WDT_INJ_FAULT bits have the same value or is corrupt
static bool IsWdtInjFlagCorrupt(void)
{
    uint8_t gprRegVal2 = GPR_ReadRegister2();
    uint8_t gprRegVal3 = GPR_ReadRegister3();
    bool wdtInjFlag0   = ((gprRegVal2 & GPR_WDT_FAULT0_BM) == GPR_WDT_FAULT0_BM);
    bool wdtInjFlag1   = ((gprRegVal3 & GPR_WDT_FAULT1_BM) == GPR_WDT_FAULT1_BM);
 
    bool isCorrupt = true;
    if (wdtInjFlag0 == wdtInjFlag1)
    {
        isCorrupt = false;
    }
 
    return isCorrupt;
}
 
// Checks whether the two PFLAG_SWDT_INJ_FAULT bits have the same value or is corrupt
static bool IsSwdtInjFlagCorrupt(void)
{
    uint8_t gprRegVal2 = GPR_ReadRegister2();
    uint8_t gprRegVal3 = GPR_ReadRegister3();
    bool swdtInjFlag0  = ((gprRegVal2 & GPR_SWDT_FAULT0_BM) == GPR_SWDT_FAULT0_BM);
    bool swdtInjFlag1  = ((gprRegVal3 & GPR_SWDT_FAULT1_BM) == GPR_SWDT_FAULT1_BM);
 
    bool isCorrupt = true;
    if (swdtInjFlag0 == swdtInjFlag1)
    {
        isCorrupt = false;
    }
 
    return isCorrupt;
}
 
// Checks whether the two PFLAG_IO_FLOAT_FAULT bits have the same value or is corrupt
static bool IsIoFloatFlagCorrupt(void)
{
    uint8_t gprRegVal2 = GPR_ReadRegister2();
    uint8_t gprRegVal3 = GPR_ReadRegister3();
    bool ioFloatFlag0  = ((gprRegVal2 & GPR_IO_FAULT0_BM) == GPR_IO_FAULT0_BM);
    bool ioFloatFlag1  = ((gprRegVal3 & GPR_IO_FAULT1_BM) == GPR_IO_FAULT1_BM);
 
    bool isCorrupt = true;
    if (ioFloatFlag0 == ioFloatFlag1)
    {
        isCorrupt = false;
    }
 
    return isCorrupt;
}
 
// Checks whether the two Invalid Input flag bits have the same value or is corrupt
static bool IsInvalidInputFlagCorrupt(void)
{
    uint8_t gprRegVal3 = GPR_ReadRegister3();
    bool invalidFlag0  = ((gprRegVal3 & GPR_INV_INPUT0_BM) == GPR_INV_INPUT0_BM);
    bool invalidFlag1  = ((gprRegVal3 & GPR_INV_INPUT1_BM) == GPR_INV_INPUT1_BM);
 
    bool isCorrupt = true;
    if (invalidFlag0 == invalidFlag1)
    {
        isCorrupt = false;
    }
 
    return isCorrupt;
}
 
// Checks if stored checksum has been corrupted
static bool IsChecksumCorrupt(void)
{
    uint16_t persistentVals = ConcatPersistentVals();
 
    uint8_t currentChecksum = CalculateChecksum(persistentVals);
    uint8_t regVal          = GPR_ReadRegister2();
    uint8_t storedChecksum  = regVal >> GPR_CHECKSUM_GP;
 
    bool isCorrupt = (currentChecksum != storedChecksum);
 
    return isCorrupt;
}
 
// Stores new checksum in GPR2 register
static void UpdateValsChecksum(void)
{
    uint16_t persistentVals = ConcatPersistentVals();
 
    uint8_t newChecksum = CalculateChecksum(persistentVals);
 
    uint8_t checksumConfig = newChecksum << GPR_CHECKSUM_GP;
    GPR_ModifyRegister2(GPR_CHECKSUM_GM, checksumConfig);
}
 
// Calculates new checksum for GPR0 and GPR1 registers
static uint8_t CalculateChecksum(uint16_t value)
{
    uint16_t shiftedVal = value;
    uint8_t numOnes     = 0U;
 
    while (shiftedVal != 0U)
    {
        numOnes += (uint8_t)(shiftedVal & 1U);
        shiftedVal = shiftedVal >> 1;
    }
 
    return numOnes;
}
 
// Concatenates the two 8-bit GPR0 (MSB) and GPR1 (LSB) registers to a 16-bit value
static uint16_t ConcatPersistentVals(void)
{
    uint16_t concatVals = (uint16_t)GPR_ReadRegister0() << 8;
    concatVals |= (uint16_t)GPR_ReadRegister1();
    return concatVals;
}