Implements APIs for the Memory Manager. More...

#include <stdbool.h>
#include <stdint.h>
#include <define_error_flags.h>
#include <driver_cpuctrl.h>
#include <driver_gpr.h>
#include <driver_nvmctrl.h>
#include <driver_ramctrl.h>
#include <midware_memory_manager.h>
#include <xc.h>

Macros
#define	GPR_ERRINJRSN_GP 6U
#define	GPR_ERRINJRSN_GM 0xC0U
#define	GPR_RSTRSN_GP 0U
#define	GPR_RSTRSN_GM 0x3FU
#define	GPR_CHECKSUM_GP 4U
#define	GPR_CHECKSUM_GM 0xF0U
#define	GPR_IS_ERRINJ0_BM 0x80U
#define	GPR_IS_ERRINJ1_BM 0x01U
#define	GPR_CPU_FAULT0_BM 0x04U
#define	GPR_CPU_FAULT1_BM 0x10U
#define	GPR_SWDT_FAULT0_BM 0x02U
#define	GPR_SWDT_FAULT1_BM 0x08U
#define	GPR_WDT_FAULT0_BM 0x01U
#define	GPR_WDT_FAULT1_BM 0x04U
#define	GPR_IO_FAULT0_BM 0x08U
#define	GPR_IO_FAULT1_BM 0x20U
#define	GPR_INV_INPUT0_BM 0x40U
#define	GPR_INV_INPUT1_BM 0x02U

Functions
errFlag_t	MW_GetClearBusError (void)
	Reads and clears the flag indicating an error in the Bus Matrix.
errFlag_t	MW_GetClearCpuDataParityError (void)
	Reads and clears the flag indicating a data bus parity error in the CPU.
errFlag_t	MW_GetClearCpuInstrParityError (void)
	Reads and clears the flag indicating a instruction bus parity error in the CPU.
errFlag_t	MW_GetClearCpuOpcodeError (void)
	Reads and clears the flag indicating an illegal opcode error in the CPU.
errFlag_t	MW_GetClearRamStackError (void)
	Reads and clears the flag indicating a stack pointer limit error in SRAM.
errFlag_t	MW_GetClearRamEccCompError (void)
	Reads and clears the flag indicating a ECC comparator error in the RAM controller.
errFlag_t	MW_GetClearRamEcc1Error (void)
	Reads and clears the flag indicating an ECC single-bit error in SRAM.
errFlag_t	MW_GetClearRamEcc2Error (void)
	Reads and clears the flag indicating an ECC multi-bit error in SRAM.
errFlag_t	MW_GetClearRamParityError (void)
	Reads and clears the flag indicating a bus parity error detected in the RAM controller.
errFlag_t	MW_GetClearNvmEccCompError (void)
	Reads and clears the flag indicating a ECC comparator error in the NVM controller.
errFlag_t	MW_GetClearNvmFlashEcc1Error (void)
	Reads and clears the flag indicating a ECC single-bit error in Flash.
errFlag_t	MW_GetClearNvmFlashEcc2Error (void)
	Reads and clears the flag indicating a ECC multi-bit error in Flash.
errFlag_t	MW_GetClearNvmParityError (void)
	Reads and clears the flag indicating a bus parity error detected in the NVM controller.
errFlag_t	MW_GetClearNvmEepromEcc1Error (void)
	Reads and clears the flag indicating an ECC single-bit error in EEPROM.
errFlag_t	MW_GetClearNvmEepromEcc2Error (void)
	Reads and clears the flag indicating an ECC multi-bit error in EEPROM.
errFlag_t	MW_SetNvmEccAllOnes (eccAllOnes_t config)
	Sets ECC all Ones (ECCALL1) scheme.
errFlag_t	MW_SetRamStackLimit (uint16_t splimAddr, bool lockEnable)
	Sets the Stack Pointer Limit value and optionally locks the value to prevent modification.
void	MW_StorePersistentFlag (persistentFlag_t flagType, bool flag)
	Stores two redundant boolean flags in General Purpose Registers (GPR) for perserving data between resets.
void	MW_StorePersistentVal (persistentVal_t valueType, uint8_t value)
	Stores a value in General Purpose Registers (GPR) for perserving data between resets.
bool	MW_GetPersistentFlag (persistentFlag_t flagType)
	Reads two redundant bits for each boolean flags in General Purpose Registers (GPR) that is stored for preserving data between resets.
uint8_t	MW_GetPersistentVal (persistentVal_t valueType)
	Reads a value in General Purpose Registers (GPR) that is stored for preserving data between resets.
bool	MW_IsPersistentFlagsCorrupt (void)
	Compares two redundant bits for each boolean flags in General Purpose Registers (GPR) and checks if any of the flags are corrupted.
bool	MW_IsPersistentValsCorrupt (void)
	Checks if any of the stored persistent values are corrupted.
void	MW_ClearPersistentFlags (void)
	Clears all stored persistent flags in GPR.
void	MW_ClearPersistentVals (void)
	Clears all stored persistent values in GPR.

Detailed Description

Implements APIs for the Memory Manager.

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Definition in file midware_memory_manager.c.

Macro Definition Documentation

◆ GPR_CHECKSUM_GM

#define GPR_CHECKSUM_GM 0xF0U

Checksum Mask in GPR2

Definition at line 68 of file midware_memory_manager.c.

◆ GPR_CHECKSUM_GP

#define GPR_CHECKSUM_GP 4U

Checksum position in GPR2

Definition at line 67 of file midware_memory_manager.c.

◆ GPR_CPU_FAULT0_BM

#define GPR_CPU_FAULT0_BM 0x04U

CPU Fault Flag bit 0 in GPR2

Definition at line 75 of file midware_memory_manager.c.

◆ GPR_CPU_FAULT1_BM

#define GPR_CPU_FAULT1_BM 0x10U

CPU Fault Flag bit 1 in GPR3

Definition at line 76 of file midware_memory_manager.c.

◆ GPR_ERRINJRSN_GM

#define GPR_ERRINJRSN_GM 0xC0U

Error Injection Reason Mask in GPR1

Definition at line 60 of file midware_memory_manager.c.

◆ GPR_ERRINJRSN_GP

#define GPR_ERRINJRSN_GP 6U

Error Injection Reason position in GPR1

Definition at line 59 of file midware_memory_manager.c.

◆ GPR_INV_INPUT0_BM

#define GPR_INV_INPUT0_BM 0x40U

Invalid Input Flag bit 0 in GPR3

Definition at line 91 of file midware_memory_manager.c.

◆ GPR_INV_INPUT1_BM

#define GPR_INV_INPUT1_BM 0x02U

Invalid Input Flag bit 1 in GPR3

Definition at line 92 of file midware_memory_manager.c.

◆ GPR_IO_FAULT0_BM

#define GPR_IO_FAULT0_BM 0x08U

IO Fault Flag bit 0 in GPR2

Definition at line 87 of file midware_memory_manager.c.

◆ GPR_IO_FAULT1_BM

#define GPR_IO_FAULT1_BM 0x20U

IO Fault Flag bit 1 in GPR3

Definition at line 88 of file midware_memory_manager.c.

◆ GPR_IS_ERRINJ0_BM

#define GPR_IS_ERRINJ0_BM 0x80U

Error Injection Flag bit 0 in GPR3

Definition at line 71 of file midware_memory_manager.c.

◆ GPR_IS_ERRINJ1_BM

#define GPR_IS_ERRINJ1_BM 0x01U

Error Injection Flag bit 1 in GPR3

Definition at line 72 of file midware_memory_manager.c.

◆ GPR_RSTRSN_GM

#define GPR_RSTRSN_GM 0x3FU

Reset Reason Mask in GPR1

Definition at line 64 of file midware_memory_manager.c.

◆ GPR_RSTRSN_GP

#define GPR_RSTRSN_GP 0U

Reset Reason position in GPR1

Definition at line 63 of file midware_memory_manager.c.

◆ GPR_SWDT_FAULT0_BM

#define GPR_SWDT_FAULT0_BM 0x02U

Synchronous Watchdog Fault Flag bit 0 in GPR2

Definition at line 79 of file midware_memory_manager.c.

◆ GPR_SWDT_FAULT1_BM

#define GPR_SWDT_FAULT1_BM 0x08U

Synchronous Watchdog Fault Flag bit 1 in GPR3

Definition at line 80 of file midware_memory_manager.c.

◆ GPR_WDT_FAULT0_BM

#define GPR_WDT_FAULT0_BM 0x01U

Watchdog Fault Flag bit 0 in GPR2

Definition at line 83 of file midware_memory_manager.c.

◆ GPR_WDT_FAULT1_BM

#define GPR_WDT_FAULT1_BM 0x04U

Watchdog Fault Flag bit 1 in GPR3

Definition at line 84 of file midware_memory_manager.c.

Macros

Functions